What is Gen-Z?
Is Gen-Z a new Industry Standard?
Why was Gen-Z developed?
Why develop a new data access technology?
What are the key technical advantages of Gen-Z?
How does Gen-Z benefit the broader industry and customers?
How does Gen-Z promote innovation?
Is a specification currently available? If so where can I get a copy?
Q: What is Gen-Z?
A: An open systems interconnect designed to provide memory semantic access to data and devices via direct-attached, switched, or fabric topologies.
Q: Is Gen-Z a new Industry Standard?
A: Yes, Gen-Z is being developed by the Gen-Z Consortium, an open industry consortium incorporated and formally formed on August 18, 2016. The Gen-Z Consortium continues its work to develop the Gen-Z specifications. Refer to our Members List to see the list of current consortium members.
Q: Why was Gen-Z developed?
A: Gen-Z was developed to enhance existing solution architectures, and enable new solution architectures, while delivering new levels of performance (high-bandwidth, low-latency), software efficiency, power optimizations, security, and industry agility.
Q: Why develop a new data access technology?
A: Customers are demanding new levels of performance, functionality, security and isolation, and ways to unlock innovation and execution agility. After many months of investigation, the member companies determined that a new, comprehensive data access technology was required; one that could support a wide range of new storage-class memory media, new hybrid and data-centric computing technologies, new memory-centric solution architectures, and a wide range of applications using a highly-efficient and performance-optimized solution stack.
Q: What are the key technical advantages of Gen-Z?
A: Gen-Z provides the following technical benefits:
- Memory media independence: Gen-Z abstracts the memory media to enable any type and mix of DRAM and non-volatile memory (NVM) to be directly accessed by applications or through block-semantic communications.
- High-bandwidth, low-latency: Very efficient, memory-semantic protocol that simplifies hardware and software designs, reducing solution cost and complexity. Gen-Z supports a wide range of signaling rates and link widths that enable solutions to scale from tens to several hundred GB/s of bandwidth with sub-100 ns load-to-use memory latency.
- Multipath: Multipath increases aggregate component performance, enables very high signaling rates enables solution resiliency to prevent loss of data access, and enables traffic segregation to allow services and applications to be isolated from one another.
- Scalability: Scales from the simple point-to-point optimized solutions to rack-scale, switch-based topologies without sacrificing performance or solution flexibility.
- Security and isolation: Supports a combination of hardware-enforced isolation techniques and full packet authentication to prevent errant or malicious components from communicating with unauthorized components or accessing unauthorized resources, e.g., memory and storage.
- Advanced workloads and technologies: Supports hybrid and data-centric computing to deliver high-performance and power-optimized solutions.
- Mechanical compatibility: Can be incorporated into any solution using a wide range of existing mechanical form factors and cables to enable Gen-Z to be easily integrated into any solution. This enables Gen-Z to be integrated into existing platforms and solution stacks.
- High-speed signaling rates: Gen-Z has the immediate capability of 56 GT/s with a path to 112 GT/s and beyond. Higher-signaling rates not only increase bandwidth, but also enable solutions to significantly reduce package pin counts, e.g., a solution using 56 GT/s requires 3x fewer pins and a solution using 112 GT/s requires 7x fewer pins to deliver the equivalent bandwidth of one using 16 GT/s.
- High-efficiency protocol: Gen-Z is ~80% efficient when transferring 64-byte data payloads and ~93% efficient when transferring 256-byte data payloads in point-to-point topologies. In switch-based topologies, Gen-Z is ~70% efficient when transferring 64-byte data payloads and ~90% efficient when transferring 256-byte data payloads (regardless of topology scale). High protocol efficiency provides greater performance and reduces the power required to deliver a given bandwidth.
Q: How does Gen-Z benefit the broader industry and customers?
A: Gen-Z provides the following industry and customer benefits:
- Gen-Z abstracts memory media from the memory controller to enable the industry to deploy a wide range of memory media without waiting for the industry to move in lock step. This enables new media types or multiple generations of a given media type to be transparently supported in any solution. It also enables customers to independently replace and upgrade components based on their needs— e.g., processors, memory modules, NVM modules, etc.
- Gen-Z specifies a highly-efficient and flexible protocol capable of supporting a wide range of application needs. Gen-Z simplifies hardware and software designs, reducing complexity, overheads, and end-to-end latency. Simple, efficient solution stacks are easier to deploy and secure, speed innovation, and reduce development and support costs.
- Gen-Z supports a robust hardware-enforced isolation and security framework to help protect customer solutions from cyber threats. Components and resources can be isolated to prevent unauthorized access. Data plane and control plane communications can be fully authenticated to prevent tampering and anti-replay attacks. Further, data payloads can be encrypted using industry or customer-driven algorithms and policies (encryption is performed within the source and destination components).
- Gen-Z interoperability enables the architecture to simultaneously and efficiently transport standard and customized communications between components. This enables customers and vendors to rapidly innovate and deploy new capabilities and services without waiting for the industry to move in lock-step.
Q: How does Gen-Z promote innovation?
A: Gen-Z promotes innovation in multiple ways:
- Gen-Z breaks the processor-memory interlock and enables new types of memory media to be transparently deployed at an accelerated rate.
- Gen-Z supports a wide variety of component types including processors, memory modules, FPGAs, GPUs / GPGPUs, DSP, I/O, accelerators, NICs, custom ASICs, and many more.
- Gen-Z supports a wide range of physical layer signaling rates and types (electrical and optical). This enables hardware to optimize performance while minimizing package costs, to scale to any bandwidth and distance within an enclosure or data center, and to provision multiple paths to provide aggregate performance and resiliency.
- Gen-Z is processor agnostic. Solutions can be flexibly composed of any mix of processor types and capability. Further, Gen-Z specifies a common atomic protocol to ensure interoperability between any processor and any component type.
Gen-Z supports traditional processor-centric and new memory-centric solution architectures.
- Gen-Z can be inserted into existing processor-centric solution architectures. This immediately enables any solution to reap Gen-Z’s benefits.
- Gen-Z supports new memory-centric architectures, enabling any-to-any communication among all component types. Memory-centric architectures minimize data movement, reduce power consumption, reduce latency, and increase data access parallelism. Memory-centric architectures take advantage of Gen-Z multipath capabilities to increase aggregate performance and resiliency and enable new services.
Q: Is a specification currently available? If so where can I get a copy?
A: All finalized Gen-Z specifications will be made available to members and non-members through the Gen-Z Consortium website.
- Draft specifications will be made available to all member companies.
- Select draft specifications and technical proposals will be periodically made available to non-members to elicit direct feedback and input into the specifications and technologies under development.
- The Core specification, covering the architecture and protocol, will be published in late 2016. Additional specifications covering firmware, mechanical form factors, physical layers, etc. will be published starting in 2017.