News & Events: Press Release

Gen-Z Consortium Signals Continued Growth with Multi-Vendor Demo and Specifications Progress at SC’17

11/13

Gen-Z Scalable Connector Specification 1.0 Released

SUPER COMPUTING CONFERENCE, Denver, CO – Nov 13, 2017 – The Gen-Z Consortium, an organization developing an open systems interconnect designed to provide high-speed, low latency, memory-semantic access to data and devices, today shared that it will show a Gen-Z multi-vendor technology demonstration connecting compute, memory, and I/O devices at the 2017 Super Computing Conference (SC’17), taking place this week in Denver, Colorado. The multi-vendor technology demonstration utilizes FPGA-based Gen-Z adapters connecting compute nodes to memory pools through a Gen-Z switch, creating a fabric that connects multiple server vendors and a variety of memory vendors.

The Gen-Z Consortium has made significant progress in its first year, more than doubling its membership since 2016 to nearly 50 companies. Recent accomplishments include the creation of the FPGA-based demo, the release of the Gen-Z Scalable Connector Specification, and contribution of the mechanical and electrical specification of its scalable connector to SNIA/SFF.

The Gen-Z Scalable Connector Specification 1.0 defines a high density solution (with a 0.6 mm pitch) that minimizes board space consumption. The three connector sizes will provide 8, 16 or 32 differential pairs in vertical and right angle implementations and will enable solutions to scale from 2.5GT/s NRZ to 112 GT/s PAM 4 signaling. The scalable connector will also support cable solutions for both copper and optical implementations. The Gen-Z Consortium looks forward to working with SNIA/SFF and other industry standards groups to enable broader use of this cutting edge connector.

The Consortium is currently preparing for the release of the Gen-Z Core Specification. The specification is in its final review cycle among its members and is set for 1.0 release to member companies in December 2017 and public availability in January 2018. The release will allow members to finalize their plans for silicon enablement.

“We’re so grateful to our member companies that have spent the last year working diligently to shape Gen-Z’s memory-centric standards-based approach and achieve tangible milestones,” said Kurtis Bowman, President of the Gen-Z Consortium. “The Consortium continues to grow and we encourage interested companies to join us as we work toward developing the future of data centers.”

Gen-Z Consortium at SC’17
Visit the Gen-Z Consortium in booth #992 at SC’17. Michael Krause, HPE VP and Fellow, will present “Understanding Gen-Z Technology – A High Performance Interconnect for the Data-Centric Future” on Tuesday, Nov. 14 at 2:30pm in room 503-504.

Supporting Resources:
• Gen-Z Consortium: http://genzconsortium.org/
• Gen-Z member list: http://genzconsortium.org/membership/
• Follow Gen-Z Consortium on: LinkedIn, Twitter and YouTube

About Gen-Z Consortium
Gen-Z is an open systems interconnect designed to provide memory semantic access to data and devices via direct-attached, switched or fabric topologies. The Gen-Z Consortium is made up of leading computer industry companies dedicated to creating and commercializing a new data access technology. The Consortium’s 12 initial members were; AMD, ARM, Broadcom, Cray, Dell EMC, Hewlett Packard Enterprise, Huawei, IDT, Micron, Samsung, SK hynix, and Xilinx with that list expanding as reflected on our Member List.

The Gen-Z Consortium strongly believes in developing an open ecosystem where members, the broader industry, and customers can work together to deliver robust, high-quality specifications that meet solution needs. The Gen-Z Consortium will periodically publicly post draft specifications and technical concepts to elicit input from the broader industry and directly from customers. For more information visit www.genzconsortium.org.

Member Quotes – Flash Memory Summit 2017

08/08

PRESS RELEASE – Supporting Member Quotes

Gen-Z Consortium Showcases World’s First Gen-Z Multi-Vendor Technology Demonstration for Memory-Centric Computing

Cavium
Gen-Z architecture aims at reducing load on CPU, by using the Gen-Z scalable high performance, low latency, memory-semantic fabric technology that can be used to communicate to every device in the system by simplifying data access at rack scale,” said Gopal Hegde, VP/GM Data Center Processor Group, Cavium. “Cavium along with its partners was one of the first to demonstrate an early implementation of the Gen-Z interconnect on its ThunderX2 ARM server. The high performance memory semantic fabric addresses the challenges of explosive data growth by providing a peer to peer interconnect, which is designed to access large volume of data while lowering overall cost & avoiding bottle necks thereby meeting the needs of advanced workloads & real time analytics.”

Dell EMC
“I’m very encouraged with the progress the Gen-Z Consortium has made in less than a year. The multi-vender demo and new 112GT/s connector shows the power of collaboration of the best minds in the industry to accelerate innovation in computing platforms,” said Robert Hormuth, Dell EMC Server CTO.

HPE
“The consortium has doubled its diverse member base since our formation only eight months ago, evidence of strong industry support for collaboratively advancing open standards to address industry challenges,” said Keith McAuliffe, VP & Chief Technologist at Hewlett Packard Enterprise. “We’re proud of what we’re accomplishing together, demonstrating Gen-Z in action and publishing multiple open specifications to move the industry forward.”

IDT
“This demonstration represents another big step in the emergence of Gen-Z as a unified, rack-scale interconnect for memory, storage and compute in tomorrow’s data center,” said Sean Fan, Senior Vice President of IDT’s Computing and Communications Group. “By bringing an open standard approach to new computing models such as memory and storage pooling, the Gen-Z Consortium is enabling a new era of data movement and processing.”

IntelliProp
“IntelliProp is very excited to be part of the Gen-Z Consortium and to be participating with a demo of our Gen-Z Persistent Memory Controller at Flash Memory Summit. Gen-Z is poised to provide industry changing performance for enterprise and memory centric compute applications.”
– Hiren Patel, VP Business Development, IntelliProp Inc.

Mellanox Technologies
“The growing demands for faster data analysis mandates technology innovations and collaborations around open standards, to deliver the needed compute and storage infrastructures today and in the future,” Said Gilad Shainer, vice president of marketing at Mellanox Technologies. “The collaboration among companies within the Gen-Z Consortium will enable tighter technology development, and the design of efficient data centers in the future.”

Micron
“High-performance computing is reaching a critical inflection point. The growth of applications and devices that can harvest and use millions of points of information per day are creating an explosion in data. Making this data available and useful is critical to everything from business manufacturing processes to scientific research,” said Ryan Baxter, director of marketing for Micron’s Compute and Networking Business Unit. “Open memory standards like Gen-Z are a recognition that the pathways that high-performance compute uses to access memory must evolve to deliver the next generation of computing performance.”

Microsemi
“Data center machine learning and analytic workloads require ever greater scalability performance from computing, memory and storage infrastructure solutions. Gen-Z enables memory to scale with CPU performance, allows for a new level of resource pooling efficiency and will unleash the full potential of emerging storage class memory technology. Microsemi endorses the open Gen-Z standard and the industry wide innovation it can deliver. Our portfolio of fabric, data protection and security technologies positions Microsemi well to deliver Gen-Z product solutions.”
– Pete Hazen, Vice President and General Manager of Microsemi’s Scalable Storage Business Unit

Samsung
“Since being launched at the end of last year, the Gen-Z Consortium has made considerable progress with releases of core, connector and mechanical specifications,” said Chiwook Kim, Vice President of Memory Product Planning & Application Engineering Team at Samsung Electronics. “The demo at FMS’17 marks a major milestone towards a memory semantics fabric that will meet the requirements of new and existing computing workloads. Samsung is delighted to be part of the Consortium and its concerted efforts to establish an open industry standard.”

SK hynix
“In pursuit of enabling future memory technologies including storage class memory, SK hynix fully supports open standards like Gen-Z. Gen-Z introduces new opportunities to innovate memory system architecture and contribute to better scalable memory solutions.”
– Sunny Khang, Vice President, Head of DRAM Product Planning & Enabling Office, SK hynix Inc.

TE Connectivity
“Our designs always strive to create real value for our customers. In this case “value” means significantly increasing architectural design flexibility by extending the distance high data rate signals can travel at a much lower system cost,” said Phil Gilchrist, CTO of Data and Devices at TE Connectivity. “Sliver is a highly versatile platform of connectors and cables that dramatically simplifies the way most components will connect, thereby reducing design risk and supply chain complexity for leading customers, and we are very pleased that COBO and Gen-Z have adopted it as a standard.”

Western Digital
“Persistent memory technologies promise to unlock huge new possibilities for managing mass data, particularly as it relates to in-memory databases, big data analytics and machine learning. Western Digital’s work with the Gen-Z Consortium, including the presentation of a first-of-its kind memory-centric technology demonstration at the Flash Memory Summit this week and collaboration with our ecosystem partners and customers to establish open standards for emerging technologies, underscores our ongoing commitment to driving the future of persistent memory.”
– Martin Fink, Executive Vice President and Chief Technology Officer for Western Digital Corporation

Xilinx
“Xilinx is committed to open standards and GenZ is well positioned to address the convergence of memory and storage,” said Manish Muthal, Vice President, Data Center Business at Xilinx. “Xilinx products are used throughout the GenZ technology showcase at FMS, illustrating the capabilities of our All Programmable devices in modern data center architectures.”

Industry Leaders Join Forces to Promote New High-Performance Interconnect

10/11

New Gen-Z Consortium to develop scalable, high-performance fabric technology aimed at simplifying data access at rack scale

BEAVERTON, OR, October 11, 2016 – A group of leading technology companies today announced the Gen-Z Consortium, an industry alliance working to create and commercialize a new scalable computing interconnect and protocol. This flexible, high-performance memory semantic fabric provides a peer-to-peer interconnect that easily accesses large volumes of data while lowering costs and avoiding today’s bottlenecks. The alliance members include AMD, ARM, Cavium Inc., Cray, Dell EMC, Hewlett Packard Enterprise (HPE), Huawei, IBM, IDT, Lenovo, Mellanox Technologies, Micron, Microsemi, Red Hat, Samsung, Seagate, SK hynix, Western Digital Corporation, and Xilinx.

Modern computer systems have been built around the assumption that storage is slow, persistent and reliable, while data in memory is fast but volatile. As new storage class memory technologies emerge that drive the convergence of storage and memory attributes, the programmatic and architectural assumptions that have worked in the past are no longer optimal. The challenges associated with explosive data growth, real-time application demands, the emergence of low latency storage class memory, and demand for rack scale resource pools require a new approach to data access.

Gen-Z provides the following benefits:

  • High Bandwidth, Low Latency: Simplified interface based on memory semantics, scalable from tens to several hundred GB/s of bandwidth, with sub-100 ns load-to-use memory latency.
  • Advanced Workloads and Technologies: Enables data centric computing with scalable memory pools and resources for real-time analytics and in-memory applications. Accelerates new memory and storage innovation.
  • Compatible and Economical: Highly software compatible with no required changes to the operating system. Scales from simple, low cost connectivity to highly capable, rack scale interconnect.

The Gen-Z Consortium, established by current board members AMD, ARM, Cray, Dell EMC, Hewlett Packard Enterprise (HPE), Huawei, IDT, Micron, Samsung, SK hynix, and Xilinx, is an open, non-proprietary, transparent industry standards body. The consortium reflects a broader industry trend that recognizes the importance of open standards and their role in providing a level playing field to promote adoption, innovation and choice. The Gen-Z Consortium is accepting new members. The core specification, covering the architecture and protocol, will be finalized in late 2016. For more information visit www.genzconsortium.org.

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Editorial contact
Rachael Watson
Nereus for Gen-Z
(503) 619-0856
rwatson@nereus-worldwide.com